MCM6706R-6 데이터 시트보기 (PDF) - Motorola => Freescale
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MCM6706R-6 Datasheet PDF : 8 Pages
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WRITE CYCLE 2 (E Controlled, See Notes 1 and 2)
MCM6706R–6 MCM6706R–7 MCM6706R–8
Parameter
Symbol Min Max Min Max Min Max Unit Notes
Write Cycle Time
tAVAV
6
—
7
—
8
—
ns
3
Address Setup Time
Address Valid to End of Write
tAVEL
0
—
0
—
0
—
ns
tAVEH
6
—
7
—
8
—
ns
Chip Enable to End of Write
tELWH,
5
—
6
—
7
—
ns
4,5
tELEH
Data Valid to End of Write
tDVEH
3
—
3.5
—
4
—
ns
Data Hold Time
tEHDX
0
—
0
—
0
—
ns
Write Recovery Time
tEHAX
0
—
0
—
0
—
ns
NOTES:
1. A write occurs during the overlap of E low and W low.
2. Product sensitivites to noise require proper grounding and decoupling of power supplies as well as minimization or elimination of bus
contention conditions during read and write cycles.
3. All write cycle timing is referenced from the last valid address to the first transitioning address.
4. If E goes low coincident with or after W goes low, the output will remain in a high impedance condition.
5. If E goes high coincident with or before W goes high, the output will remain in a high impedance condition.
A (ADDRESS)
E (CHIP ENABLE)
W (WRITE ENABLE)
D (DATA IN)
WRITE CYCLE 2
tAVAV
tAVEH
tAVEL
tELEH
tELWH
tDVEH
DATA VALID
tEHAX
tEHDX
Q (DATA OUT)
HIGH–Z
ORDERING INFORMATION
(Order by Full Part Number)
Motorola Memory Prefix
Part Number
MCM 6706R X XX XX
Shipping Method (R2 = Tape and Reel, Blank = Rails)
Speed (6 = 6 ns, 7 = 7 ns, 8 = 8 ns)
Package (J = 300 mil SOJ)
Full Part Numbers — MCM6706J6
MCM6706RJ6R2
MCM6706RJ7
MCM6706RJ7R2
MCM6706RJ8
MCM6706RJ8R2
MCM6706R
6
MOTOROLA FAST SRAM
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