H11N12VM 데이터 시트보기 (PDF) - Fairchild Semiconductor
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H11N12VM Datasheet PDF : 9 Pages
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6-PIN DIP
HIGH SPEED LOGIC OPTOCOUPLERS
H11N1-M
H11N2-M
H11N3-M
Package Dimensions (Through Hole)
0.350 (8.89)
0.320 (8.13)
0.260 (6.60)
0.240 (6.10)
Package Dimensions (Surface Mount)
0.350 (8.89)
0.320 (8.13)
0.390 (9.90)
0.260 (6.60) 0.332 (8.43)
0.240 (6.10)
0.070 (1.77)
0.040 (1.02)
0.200 (5.08)
0.115 (2.93)
0.014 (0.36)
0.010 (0.25)
0.100 (2.54)
0.015 (0.38)
0.020 (0.50)
0.016 (0.41)
0.100 (2.54)
0.320 (8.13)
15°
0.012 (0.30)
Package Dimensions (0.4” Lead Spacing)
0.350 (8.89)
0.320 (8.13)
0.260 (6.60)
0.240 (6.10)
0.070 (1.77)
0.040 (1.02)
0.014 (0.36)
0.010 (0.25)
0.200 (5.08)
0.115 (2.93)
0.100 (2.54)
0.015 (0.38)
0.020 (0.50)
0.016 (0.41)
0.100 [2.54]
0.012 (0.30)
0.008 (0.21)
0.425 (10.80)
0.400 (10.16)
0.070 (1.77)
0.040 (1.02)
0.200 (5.08)
0.115 (2.93)
0.025 (0.63)
0.020 (0.51)
0.020 (0.50)
0.016 (0.41)
0.014 (0.36)
0.010 (0.25)
0.320 (8.13)
0.012 (0.30)
0.008 (0.20)
0.100 [2.54]
0.035 (0.88)
0.006 (0.16)
Recommended Pad Layout for
Surface Mount Leadform
0.070 (1.78)
0.060 (1.52)
0.425 (10.79)
0.100 (2.54)
0.305 (7.75)
0.030 (0.76)
© 2003 Fairchild Semiconductor Corporation
Page 6 of 9
4/14/03
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