NLV74HC4052ADR2G(2013) 데이터 시트보기 (PDF) - ON Semiconductor
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NLV74HC4052ADR2G Datasheet PDF : 17 Pages
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MC74HC4051A, MC74HC4052A, MC74HC4053A
DC CHARACTERISTICS — Analog Section
Guaranteed Limit
Symbol
Parameter
Ron Maximum “ON” Resistance
Condition
Vin = VIL or VIH; VIS = VCC to
VEE; IS ≤ 2.0 mA
(Figures 1, 2)
VCC VEE −55 to 25°C ≤85°C ≤125°C Unit
4.5 0.0
190
4.5 − 4.5
120
6.0 − 6.0
100
240
280
W
150
170
125
140
Vin = VIL or VIH; VIS = VCC or
4.5
0.0
150
VEE (Endpoints); IS ≤ 2.0 mA
4.5 − 4.5
100
(Figures 1, 2)
6.0 − 6.0
80
190
230
125
140
100
115
DRon
Ioff
Maximum Difference in “ON”
Resistance Between Any Two
Channels in the Same Package
Maximum Off−Channel Leakage
Current, Any One Channel
Vin = VIL or VIH;
VIS = 1/2 (VCC − VEE);
IS ≤ 2.0 mA
Vin = VIL or VIH;
VIO = VCC − VEE;
Switch Off (Figure 3)
4.5 0.0
30
4.5 − 4.5
12
6.0 − 6.0
10
6.0 − 6.0
0.1
35
40
W
15
18
12
14
mA
0.5
1.0
Maximum Off−ChannelHC4051A Vin = VIL or VIH;
Leakage Current,
HC4052A VIO = VCC − VEE;
Common Channel HC4053A Switch Off (Figure 4)
6.0 − 6.0
0.2
6.0 − 6.0
0.1
6.0 − 6.0
0.1
2.0
4.0
1.0
2.0
1.0
2.0
Ion Maximum On−ChannelHC4051A Vin = VIL or VIH;
Leakage Current, HC4052A Switch−to−Switch =
Channel−to−Channel HC4053A VCC − VEE; (Figure 5)
AC CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns)
Symbol
Parameter
6.0 − 6.0
0.2
6.0 − 6.0
0.1
6.0 − 6.0
0.1
2.0
4.0
mA
1.0
2.0
1.0
2.0
VCC
Guaranteed Limit
V −55 to 25°C ≤85°C ≤125°C Unit
tPLH,
tPHL
Maximum Propagation Delay, Channel−Select to Analog Output
(Figure 9)
2.0
270
3.0
90
4.5
59
6.0
45
320
350
ns
110
125
79
85
65
75
tPLH,
tPHL
Maximum Propagation Delay, Analog Input to Analog Output
(Figure 10)
2.0
40
3.0
25
4.5
12
6.0
10
60
70
ns
30
32
15
18
13
15
tPLZ,
tPHZ
Maximum Propagation Delay, Enable to Analog Output
(Figure 11)
2.0
160
3.0
70
4.5
48
6.0
39
200
220
ns
95
110
63
76
55
63
tPZL,
tPZH
Maximum Propagation Delay, Enable to Analog Output
(Figure 11)
2.0
245
3.0
115
4.5
49
6.0
39
315
345
ns
145
155
69
83
58
67
Cin Maximum Input Capacitance, Channel−Select or Enable Inputs
CI/O Maximum Capacitance
Analog I/O
(All Switches Off)
Common O/I: HC4051A
HC4052A
HC4053A
10
10
10
pF
35
35
35
pF
130
130
130
80
80
80
50
50
50
Feed−through
1.0
1.0
1.0
Typical @ 25°C, VCC = 5.0 V, VEE = 0 V
CPD Power Dissipation Capacitance (Figure 13)*
HC4051A
45
pF
HC4052A
80
HC4053A
45
* Used to determine the no−load dynamic power consumption: PD = CPD VCC2f + ICC VCC.
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