MC68HC05B8CB 데이터 시트보기 (PDF) - Freescale Semiconductor

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MC68HC05B8CB

Microcontrollers

Freescale Semiconductor 

INDEX

In this index numeric entries are placed first; page references in italics indicate that the reference

is to a figure.

A

A/D converter

block diagram 8–2

during STOP mode 8–6

during WAIT mode 8–6

operation 8–1

registers

ADDATA 8–3

ADSTAT 8–4

PORTD 8–3

, , , , A/D converter characteristics 11–8 11–9 E–24 E–25

, , , , F–22 F–23 H–25 H–26 I–3

A/D status/control register

ADON 4–5

absolute maximum ratings 11–1

ADDATA – A/D result data register 8–3

ADON – A/D converter on 8–5

ADON – A/D converter on bit 4–5

ADRC – A/D RC oscillator control 8–4

ADSTAT

ADON 8–5

ADRC 8–4

CH3-CH0 8–5

COCO 8–4

ADSTAT – A/D status/control register 8–4

alternate counter register 5–3

analog input 8–6

B

Baud rate register

SCP1, SCP0 6–18

SCR2, SCR1, SCR0 6–19

SCT2, SCT1, SCT0 6–18

block diagrams

MC68HC05B16 D–3

MC68HC05B32 G–2

MC68HC05B4 A–2

MC68HC05B8 B–2

MC68HC705B16 E–2

MC68HC705B16N F–2

MC68HC705B32 H–4

MC68HC705B5 C–2

PLM system 7–1

, programmable timer 5–2

SCI 6–2 6–2

, , watchdog system 9–3

bootstrap mode C–8 E–10 H–12

C

ceramic resonator 2–11

CH3-CH0 – A/D channels 3, 2, 1 and 0 8–5

COCO – Conversion complete flag 8–4

, , , , , , control timing 11–10 11–11 C–19 E–26 E–27 F–24

, , , F–25 H–27 H–28 I–4

COP watchdog 9–3

during STOP mode 9–4

during WAIT mode 9–4

counter 5–1

counter register 5–3

CPHA – Clock phase 6–12

CPOL – Clock polarity 6–12

crystal 2–11

D

data direction registers

DDRA, DDRB, DDRC 4–5

data format 6–5

, , , , DC electrical characteristics 11–2 11–5 C–19 E–22

, , , , , E–23 F–20 F–21 H–23 H–24 I–2

E

, , E1ERA – EEPROM erase/programming bit 3–3 E–7

, F–7 H–9

E1LAT – EEPROM programming latch enable 3–4

, E1LAT – EEPROM programming latch enable bit E–7

, F–7 H–10

MC68HC05B6

INDEX

Freescale

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