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MC100E112FNR2 데이터 시트보기 (PDF) - ON Semiconductor

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MC100E112FNR2
ON-Semiconductor
ON Semiconductor 
MC100E112FNR2 Datasheet PDF : 8 Pages
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MC10E112, MC100E112
5V ECL Quad Driver
Description
The MC10E/100E112 is a quad driver with two pairs of OR/NOR
outputs from each gate, and a common, buffered enable input. Using
the data inputs the device can serve as an ECL memory address
fan-out driver. Using just the enable input, the device serves as a clock
driver, although the MC10E/100E111 is designed specifically for this
purpose, and offers lower skew than the E112. For memory address
driver applications where scan capabilities are required, please refer to
the E212 device.
The 100 Series contains temperature compensation.
Features
600 ps Max. Propagation Delay
Common Enable Input
PECL Mode Operating Range: VCC = 4.2 V to 5.7 V
with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V
with VEE = 4.2 V to 5.7 V
Internal Input 50 kW Pulldown Resistors
ESD Protection: Human Body Model; > 2 kV,
Machine Model; > 200 V
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level:
Pb = 1
PbFree = 3
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL 94 V0 @ 0.125 in,
Oxygen Index: 28 to 34
Transistor Count = 125 devices
PbFree Packages are Available*
http://onsemi.com
PLCC28
FN SUFFIX
CASE 776
MARKING DIAGRAM*
1
MCxxxE112G
AWLYYWW
xxx = 10 or 100
A
= Assembly Location
WL = Wafer Lot
YY
= Year
WW = Work Week
G
= PbFree Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
1
November, 2006 Rev. 8
Publication Order Number:
MC10E112/D

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