MB91266APMC-G-XXXE1 데이터 시트보기 (PDF) - Fujitsu
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MB91266APMC-G-XXXE1 Datasheet PDF : 55 Pages
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MB91265A Series
Pin no.
Pin
name
I/O
Circuit
type*1
Description
TOT1
Output terminal of reload timer 1.
This function becomes valid when output of reload timer 1 is set to enabled.
24
D
P06
General purpose input/output port.
This function becomes valid when output of reload timer 1 is set to disabled.
TOT2
Output terminal of reload timer 2.
This function becomes valid when output of reload timer 2 is set to enabled.
25
D
P07
General purpose input/output port.
This function becomes valid when output of reload timer 2 is set to disabled.
SOT0
UART0 data output terminal.
This function becomes valid when data output of UART0 is set to enabled.
26
D
P10
General purpose input/output port.
This function becomes valid when data output of UART0 is set to disabled.
SIN0
27
P11
UART0 data input terminal.
Since this input is used as required while the UART0 input is enabled, the port output
D must remain off unless intentionally used.
General purpose input/output port.
This function becomes valid when data input of UART0 is set to disabled.
SCK0
UART0 clock input/output terminal.
This function becomes valid when clock output of UART0 is set to enabled.
28
D
P12
General purpose input/output port.
This function becomes valid when clock output of UART0 is set to disabled.
SOT1
UART1 data output terminal.
This function becomes valid when data output of UART1 is set to enabled.
29
D
P13
General purpose input/output port.
This function becomes valid when data output of UART1 is set to disabled.
SIN1
30
P14
UART1 data input terminal.
Since this input is used as required while the UART1 input is enabled, the port output
D must remain off unless intentionally used.
General purpose input/output port.
This function becomes valid when data input of UART1 is set to disabled.
SCK1
UART1 clock input/output terminal.
This function becomes valid when clock output of UART1 is set to enabled.
31
D
P15
General purpose input/output port.
This function becomes valid when clock output of UART1 is set to disabled.
(Continued)
6
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