Precision, CMOS Analog Switches
______________________________________Test Circuits/Timing Diagrams (continued)
LOGIC
INPUT
+3V
0V
VCOM
50%
VO1
SWITCH
0V
OUTPUT 1 VCOM
VO2
0.9VO
0.9V0
SWITCH
V0
OUTPUT 2
tD
tD
Figure 4. MAX319 Break-Before-Make Test Circuit
MAX319
+5V
+15V
NC
VL
+10V
NO
IN1, IN2
LOGIC
GND
INPUT
V+
COM
V-
-15V
VO
RL
CL
300Ω
35pF
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
VO
IN
OFF
∆VO
OFF
ON
ON
OFF
OFF
IN
Q = (∆VO)(CL)
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
Figure 5. Charge-Injection Test Circuit
VGEN
+5V
COM
GND
+15V
V+
NC OR
NO
V-
-15V
VIN = +3V
MAX317
MAX318
MAX319
VO
CL
10nF
8 _______________________________________________________________________________________