MAX1882 데이터 시트보기 (PDF) - Maxim Integrated

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MAX1882

Quad-Output TFT LCD DC-DC Converters with Buffer

Maxim Integrated 

Quad-Output TFT LCD DC-DC

Converters with Buffer

Input-Output (Dropout) Voltage and Startup

A linear regulator’s minimum input-to-output voltage dif-

ferential (dropout voltage) determines the lowest use-

able supply voltage. Because the MAX1778/

MAX1881/MAX1883/MAX1884 use an internal PNP

transistor (or external NPN transistor), their dropout

voltage is a function of the transistor’s collector-to-emit-

ter saturation voltage (see Typical Operating

Characteristics). The linear regulator’s quiescent cur-

rent increases when in dropout.

The internal linear regulator will try to start up once its

supply voltage (VSUPL) exceeds 4V. When the linear

regulator powers up, the linear regulator may be in

dropout if the linear regulator’s output set voltage is

higher than its input supply voltage. Therefore, during

this brief period, the linear regulator draws additional

supply current until the input supply voltage exceeds

the output set voltage plus the pass transistor’s satura-

tion voltage (VLDO(SET) + VCE(SAT)).

VCOM Buffer (Operational

Transconductance Amplifier)

Buffer Output Voltage and Capacitor Selection

The positive input (BUF+) features dual mode opera-

tion. Connect BUF+ to GND for the preset VSUPB/2

output voltage, set by an internal 50% resistive-divider.

Adjust the amplifier’s output voltage by connecting a

voltage-divider from SUPB to BUF+ to GND (Figure 6).

Select R12 in the 10kΩ to 100kΩ range. Calculate R11

with the following equation:

R11

=



R12

VSUPB

VBUF+





-



1



where VSUPB may range from 4.5V to 13V, and VBUF+

may range from 1.2V to (VSUPB - 1.2V). Connect a mini-

mum 1µF ceramic capacitor from BUFOUT to ground.

PC Board Layout and Grounding

Careful PC board layout is extremely important for

proper operation. Follow the following guidelines for

good PC board layout:

1) Place the main step-up converter output diode and

output capacitor less than 0.2in (5mm) from the LX

and PGND pins with wide traces and no vias.

2) Separate analog ground and power ground. The

ground connections for the step-up converter’s and

charge pump’s input and output capacitors should

be connected to the power ground plane. The lin-

ear regulator’s and VCOM buffer’s input and output

capacitors should be connected to a separate

power-ground path, star-connected to the PGND

pin to minimize voltage drops. When using multi-

layer boards, the top layer should contain the boost

INPUT

VIN = 3.3V CIN

4.7µF

C1

0.22µF

CREF

0.22µF

L1

6.8µH

IN

LX

SHDN

FB

MAX1778

MAX1883

(MAX1881)*

(MAX1884)* SUPL

INTG

LDOOUT

REF

FBL

PGND

GND

R1

274kΩ

R2

49.9kΩ

R5

1.5kΩ

CLDOOUT

4.7µF

C2

0.01µF

C3

0.01µF

MAIN

COUT

VMAIN = 8V

(2) 4.7µF

CLDOIN

1µF

Q1

R3

49.9kΩ

LDO

CLDO VLDO = 2.5V

1µF

R4

49.9kΩ

Figure 7. External Linear Regulator

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