AMD 2-/3-Output Mobile Serial
VID Controller
side. According to the manufacturer’s data sheet, a single
IRF7811W has a maximum gate charge of 24nC (VGS =
5V). Using the above equation, the required boost
capacitance would be:
:
CBST
=
2 × 24nC
200mV
= 0.24µF
Selecting the closest standard value, this example
requires a 0.22µF ceramic capacitor.
NB SMPS Design Procedure
NB Inductor Selection
The switching frequency and operating point (% ripple
current or LIR) determine the inductor value as follows:
:
L3
=
⎛
⎝⎜⎜
VIN3 − VOUT3
fSW3ILOAD3(MAX)LIR
⎞⎛
⎠⎟⎟⎝⎜
VOUT3
VIN3
⎞
⎟
⎠
where ILOAD3(MAX) is the maximum current and fSW3 is
the switching frequency of the NB regulator.
Find a low-loss inductor having the lowest possible DC
resistance that fits in the allotted dimensions. If using
a swinging inductor (where the inductance decreases
linearly with increasing current), evaluate the LIR with
properly scaled inductance values. For the selected
inductance value, the actual peak-to-peak inductor rip-
ple current (∆IINDUCTOR) is defined by:
:
∆IINDUCTOR
=
VOUT3 (VIN3 − VOUT3 )
VIN3fSW3L3
Ferrite cores are often the best choice, although pow-
dered iron is inexpensive and can work well at 200kHz.
The core must be large enough not to saturate at the
peak inductor current (IPEAK3):
IPEAK3
=
ILOAD3(MAX)+
⎛
⎝⎜
∆IINDUCTOR
2
⎞
⎠⎟
NB Peak Inductor Current Limit (ILIM3)
The MAX17080 NB regulator overcurrent protection
employs a peak current-sensing algorithm that uses the
high-side MOSFET RON(NH3) as the current-sense ele-
ment. Since the controller limits the peak inductor cur-
rent, the maximum average load current is less than the
peak current-limit threshold by an amount equal to half
the inductor ripple current. Therefore, the maximum
load capability is a function of the current-limit setting,
inductor value, switching frequency, and input-to-out-
put voltage difference. When combined with the output
undervoltage-protection circuit, the system is effectively
protected against excessive overload conditions.
The peak current-limit threshold is set by the ILIM3 pin
setting (see the Offset and Current-Limit Setting for NB
SMPS (ILIM3) section).
NB Output Capacitor Selection
The output filter capacitor must have low enough ESR
to meet output ripple and load-transient requirements.
In CPU VCORE converters and other applications where
the output is subject to large load transients, the output
capacitor’s size typically depends on how much ESR is
needed to prevent the output from dipping too low
under a load transient. Ignoring the sag due to finite
capacitance:
:
(RESR
+ RPCB )
≤
VSTEP
∆I LOAD(MAX)
The output capacitor’s size often depends on how
much ESR is needed to maintain an acceptable level of
output ripple voltage. The output ripple voltage of a
step-down controller equals the total inductor ripple
current multiplied by the output capacitor’s ESR. For
single-phase operation, the maximum ESR to meet the
output-ripple-voltage requirement is:
:
RESR
≤
⎡⎣⎢⎢(VIN3V−INV3OfSUWT33L) V3OUT3
⎤
⎦⎥⎥ VRIPPLE3
where fSW3 is the switching frequency. The actual capac-
itance value required relates to the physical size needed
to achieve low ESR, as well as to the chemistry of the
capacitor technology. Thus, capacitor selection is usual-
ly limited by ESR and voltage rating rather than by
capacitance value (this is true of polymer types).
The capacitance value required is determined primarily
by the stability requirements. However, the soar and
sag calculations are still provided here for reference.
Low inductor values allow the inductor current to slew
faster, replenishing charge removed from or added to
the output filter capacitors by a sudden load step.
Therefore, the amount of output soar and sag when the
load is applied or removed is a function of the output
voltage and inductor value. The soar and sag voltages
are calculated as:
( ) VSOAR3 =
∆ILOAD3(MAX)
2
L3
2VOUT3COUT3
2
( ( ) ) ( ) :VSAG3
=
∆ILOAD3(MAX)
2COUT3 VIN3 × DMAX
L3
− VOUT3
+ ∆ILOAD3(MAX) tSW3 − ∆t
COUT3
where DMAX is the maximum duty cycle of the NB
SMPS as listed in the Electrical Characteristics table,
tSW3 is the NB switching period programmed by the
OSC pin, and ∆t equals VOUT/VIN x tSW when in forced-
PWM mode, or L x ILX3MIN/(VIN - VOUT) when in pulse-
skipping mode.
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