LTC2239I 데이터 시트보기 (PDF) - Linear Technology

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LTC2239I

10-Bit, 80Msps Low Noise 3V ADC

Linear Technology 

LTC2239

APPLICATIO S I FOR ATIO

The 1.5V bandgap reference serves two functions: its

output provides a DC bias point for setting the common

mode voltage of any external input circuitry; additionally,

the reference is used with a difference amplifier to gener-

ate the differential reference levels needed by the internal

ADC circuitry. An external bypass capacitor is required for

the 1.5V reference output, VCM. This provides a high

frequency low impedance path to ground for internal and

external circuitry.

The difference amplifier generates the high and low refer-

ence for the ADC. High speed switching circuits are

connected to these outputs and they must be externally

bypassed. Each output has two pins. The multiple output

pins are needed to reduce package inductance. Bypass

capacitors must be connected as shown in Figure 9.

Other voltage ranges in-between the pin selectable ranges

can be programmed with two external resistors as shown

in Figure 10. An external reference can be used by applying

its output directly or through a resistor divider to SENSE.

It is not recommended to drive the SENSE pin with a logic

device. The SENSE pin should be tied to the appropriate

level as close to the converter as possible. If the SENSE pin

is driven externally, it should be bypassed to ground as

close to the device as possible with a 1µF ceramic capacitor.

1.5V

12k

0.75V

12k

VCM

2.2µF

SENSE LTC2239

1µF

Input Range

The input range can be set based on the application. The

2V input range will provide the best signal-to-noise perfor-

mance while maintaining excellent SFDR. The 1V input

range will have better SFDR performance, but the SNR will

degrade by 0.7dB.

Driving the Clock Input

The CLK input can be driven directly with a CMOS or TTL

level signal. A sinusoidal clock can also be used along with

a low-jitter squaring circuit before the CLK pin (see

Figure 11).

The noise performance of the LTC2239 can depend on the

clock signal quality as much as on the analog input. Any

noise present on the clock signal will result in additional

aperture jitter that will be RMS summed with the inherent

ADC aperture jitter.

In applications where jitter is critical, such as when digitiz-

ing high input frequencies, use as large an amplitude as

possible. Also, if the ADC is clocked with a sinusoidal

signal, filter the CLK signal to reduce wideband noise and

distortion products generated by the source.

SINUSOIDAL

CLOCK

INPUT

4.7µF

CLEAN

SUPPLY

FERRITE

BEAD

0.1µF

0.1µF 1k

CLK

50Ω 1k NC7SVU04

LTC2239

2239 F10

Figure 10. 1.5V Range ADC

2239 F11

Figure 11. Sinusoidal Single-Ended CLK Drive

2239fa

15

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