LTC1291D(RevA) 데이터 시트보기 (PDF) - Linear Technology

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LTC1291D
(Rev.:RevA)

Single Chip 12-Bit Data Acquisition System

Linear Technology 

LTC1291

BLOCK DIAGRA

VCC (VREF) 8

INPUT

DIN

5

SHIFT

REGISTER

CH0

CH1

2

3

ANALOG

INPUT MUX

SAMPLE

AND

HOLD

COMP

12-BIT

CAPACITIVE

DAC

7

CLK

OUTPUT

SHIFT

REGISTER

6

DOUT

12-BIT

SAR

4

GND

TEST CIRCUITS

Load Circuit for tdDO, tr and tf

1.4V

DOUT

3k

100pF

TEST POINT

1291 TC02

On and Off Channel Leakage Current

5V

ION

A

ON CHANNEL

IOFF

A

OFF CHANNEL

POLARITY

6

1291 TC01

CONTROL

AND

TIMING

1

CS

1291 BD

Load Circuit for tdis and ten

TEST POINT

DOUT

3k

100pF

5V tdis WAVEFORM 2, ten

tdis WAVEFORM 1

1291 TC05

Voltage Waveforms for tdis

CS

2.0V

DOUT

WAVEFORM 1

(SEE NOTE 1)

DOUT

WAVEFORM 2

(SEE NOTE 2)

90%

tdis

10%

1291 TC06

NOTE 1: WAVEFORM 1 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH

THAT THE OUTPUT IS HIGH UNLESS DISABLED BY THE OUTPUT CONTROL.

NOTE 2: WAVEFORM 2 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH

THAT THE OUTPUT IS LOW UNLESS DISABLED BY THE OUTPUT CONTROL.

1291fa

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