LT1579
ELECTRICAL CHARACTERISTICS
PARAMETER
Adjust Pin Bias Current
(Notes 2, 7)
Minimum Input Voltage
(Note 8)
Minimum Load Current
Secondary Select
Threshold
Secondary Select Pin
Current (Note 7)
Low-Battery Trip Threshold
Low-Battery Comparator
Hysteresis
Low-Battery Comparator
Bias Current (Notes 7, 10)
Logic Flag Output Voltage
Ripple Rejection
Current Limit
Input Reverse Leakage
Current
Reverse Output Current
CONDITIONS
TJ = 25°C
ILOAD = 0mA
LT1579 VIN1 = VIN2 = 3.2V
Switch from VIN2 to VIN1
Switch from VIN1 to VIN2
VSS = 0V
VIN1 = VIN2 = VOUT(NOMINAL) + 1V, High-to-Low Transition
VIN1 = VIN2 = 6V, ILBO = 20µA (Note 11)
VIN1 = VIN2 = 6V, VLBI = 1.4V, TJ = 25°C
ISINK = 20µA
ISINK = 5mA
VIN1 – VOUT = VIN2 – VOUT = 1.2V (Avg), VRIPPLE = 0.5VP-P
fRIPPLE = 120Hz, ILOAD = 150mA
VIN1 = VIN2 = VOUT(NOMINAL) + 1V, ∆VOUT = – 0.1V
VIN1 = VIN2 = –20V, VOUT = 0V
LT1579-3 VOUT = 3V, VIN1 = VIN2 = 0V
LT1579-3.3 VOUT = 3.3V, VIN1 = VIN2 = 0V
LT1579-5 VOUT = 5V, VIN1 = VIN2 = 0V
MIN TYP MAX UNITS
6
30
nA
q
2.7 3.2
V
q
3
µA
q
1.2 2.8
V
q 0.25 0.75
V
q
1
1.5
µA
q 1.440 1.500 1.550
V
q
18
30
mV
2
5
nA
q
0.17 0.45
V
q
0.97 1.3
V
55
70
dB
q 320 400
mA
q
1.0
mA
3
12
µA
3
12
µA
3
12
µA
The q denotes specifications which apply over the full operating
temperature range.
Note 1: Operating conditions are limited by maximum junction
temperature. The regulated output voltage specification will not apply for
all possible combinations of input voltage and output current. When
operating at maximum input voltage, output current must be limited.
When operating at maximum output current, the input voltage range must
be limited.
Note 2: The LT1579 (adjustable version) is tested and specified with the
adjust pin connected to the output pin and a 3µA DC load.
Note 3: Dropout voltage is the minimum input-to-output voltage
differential required to maintain regulation at the specified output current.
In dropout, the output voltage will be equal to VIN – VDROPOUT.
Note 4: To meet the requirements for minimum input voltage, the LT1579
(adjustable version) is connected with an external resistor divider for a
3.3V output voltage (see curve of Minimum Input Voltage vs Temperature
in the Typical Performance Characteristics). For this configuration,
VOUT(NOMINAL) = 3.3V.
Note 5: Ground pin current will rise at TJ > 75°C. This is due to internal
circuitry designed to compensate for leakage currents in the output
transistor at high temperatures. This allows quiescent current to be
minimized at lower temperatures, yet maintain output regulation at high
temperatures with light loads. See the curve of Quiescent Current vs
Temperature in the Typical Performance Characteristics.
Note 6: Standby current is the minimum quiescent current for a given
input while the other input supplies the load and bias currents.
Note 7: Current flow is out of the pin.
Note 8: Minimum input voltage is the voltage required on either input to
maintain the 1.5V reference for the error amplifier and low-battery
comparators.
Note 9: Total quiescent current in shutdown will be approximately equal to
IVIN1 + IVIN2 – ISRC. Both IVIN1 and IVIN2 are specified for worst-case
conditions. IVIN1 is specified under the condition that VIN1 > VIN2 and IVIN2
is specified under the condition that VIN2 > VIN1. ISRC is drawn from the
highest input voltage only. For normal operating conditions, the quiescent
current of the input with the lowest input voltage will be equal to the
specified quiescent current minus ISRC. For example, if VIN1 = 20V, VIN2 =
6V then IVIN1 = 5µA and IVIN2 = 5µA – 3µA = 2µA.
Note 10: The specification applies to both inputs independently
(LBI1, LBI2).
Note 11: Low-battery comparator hysteresis will change as a function of
current in the low-battery comparator output. See the curve of Low-Battery
Comparator Hysteresis vs Sink Current in the Typical Performance
Characteristics.
4