LPC1102UK 데이터 시트보기 (PDF) - NXP Semiconductors.
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LPC1102UK Datasheet PDF : 43 Pages
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NXP Semiconductors
LPC1102/1104
32-bit ARM Cortex-M0 microcontroller
• Optional windowed operation requires reload to occur between a minimum and
maximum time period, both programmable.
• Optional warning interrupt can be generated at a programmable time prior to
watchdog time-out.
• Enabled by software but requires a hardware reset or a watchdog reset/interrupt to be
disabled.
• Incorrect feed sequence causes reset or interrupt if enabled.
• Flag to indicate watchdog reset.
• Programmable 24-bit timer with internal prescaler.
• Selectable time period from (Tcy(WDCLK) 256 4) to (Tcy(WDCLK) 224 4) in
multiples of Tcy(WDCLK) 4.
• The Watchdog Clock (WDCLK) source can be selected from the IRC or the dedicated
watchdog oscillator (WDO). This gives a wide range of potential timing choices of
watchdog operation under different power conditions.
7.14 Clocking and power control
7.14.1 Crystal oscillators
The LPC1102/1104 include two independent oscillators. These are the Internal RC
oscillator (IRC) and the Watchdog oscillator. Each oscillator can be used for more than
one purpose as required in a particular application.
Following reset, the LPC1102/1104 operate from the Internal RC oscillator until switched
by software. This allows systems to operate without any external crystal and the
bootloader code to operate at a known frequency.
See Figure 4 for an overview of the LPC1102/1104 clock generation.
LPC1102_1104
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 26 September 2013
© NXP B.V. 2013. All rights reserved.
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