L74VHC1G125DTT3 데이터 시트보기 (PDF) - Leshan Radio Company,Ltd
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L74VHC1G125DTT3 Datasheet PDF : 6 Pages
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LESHAN RADIO COMPANY, LTD.
Noninverting 3−State Buffer
L74VHC1G125
The L74VHC1G125 is an advanced high speed CMOS noninverting 3 state buffer fabricated with silicon gate
noninverting 3 state buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to
equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffered 3-state output which provides high noise immunity
and stable output.
The L74VHC1G125 input structure provides protection when voltages up to 7.0V are applied,regardless of
the supply voltage. This allows the L74VHC1G125 to be used to interface 5.0V circuits to 3.0V circuits.
Features
• High Speed: tPD = 3.5 ns (Typ) at VCC = 5.0 V
• Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Pin and Function Compatible with Other Standard Logic Families
• Chip Complexity: FETs = 58; Equivalent Gates = 15
• Pb−Free Packages are Available
5
4
1
2
3
SC–88A/SOT–353/SC–70
DF SUFFIX
MARKING
DIAGRAMS
5
W0 M G
G
1
5
4
1
2
3
TSOP–5/SOT–23/SC–59
DT SUFFIX
5
W0 AYW G
G
1
OE 1
IN A 2
5 VCC
GND 3
4 OUT Y
Figure 1. Pinout (Top View)
OE
EN
IN A
OUT Y
Figure 2. Logic Symbol
PIN ASSIGNMENT
1
OE
2
IN A
3
GND
4
OUT Y
5
VCC
A Input
L
H
X
FUNCTION TABLE
OE Input
Y Output
L
L
L
H
H
Z
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
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