ISL6551(2006) 데이터 시트보기 (PDF) - Intersil

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ISL6551
(Rev.:2006)

ZVS Full Bridge PWM Controller

Intersil 

Functional Block Diagram

ISL6551

BANDGAP

REFERENCE

BGREF 8

PKILIM 7

R_LEB 9

R_RESDLY 4

RESODLY

ISENSE 6

R_RA 5

CT 2

RD 3

EAO 14

RAMP

ADJUST

CLOCK

GENERATOR

ERROR AMP

(See Fig. 4)

EAI 13

EANI 12

DC OK

UVLO

SSHHUUTTDDOOWWNN

LLAATTCCHH

SSOOFFT-T

SSTTAARRTT

SSHHUUTTDDOOWWNN

UPPER1

DRIVER

27 VDDP1

24 UPPER1

LEB

PWM

LOGIC

UPPER2

DRIVER

23 UPPER2

LOWER1

DRIVER

26 VDDP2

22 LOWER1

CURRENT

SHARE

LOWER2

DRIVER

21 LOWER2

CIRCUITS REFERENCED TO VSS

4

CIRCUITS REFERENCED TO PGND

EXTERNAL SINGLE POINT CONNECTION REQUIRED

FN9066.5

January 3, 2006

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