IDT82V3380EQG 데이터 시트보기 (PDF) - Integrated Device Technology
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IDT82V3380EQG Datasheet PDF : 175 Pages
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IDT82V3380
SYNCHRONOUS ETHERNET WAN PLL
Table 1: Pin Description (Continued)
Name
VDDA1
Pin No.
I/O
6
VDDA2
19
Power
Type
Description 1
VDDAn: 3.3 V Analog Power Supply
Each VDDAn should be paralleled with ground through a 0.1 µF capacitor.
-
VDDA3
VDD_AMI
VDD_DIFF1
VDD_DIFF2
DGND1
91
26
Power
-
VDD_AMI: 3.3 V Power Supply for AMI I/O
33
Power
-
VDD_DIFF1: 3.3 V Power Supply for OUT6
39
Power
-
VDD_DIFF2: 3.3 V Power Supply for OUT7
11
DGNDn: Digital Ground
DGND2
15
DGND3
14
DGND4
49
Ground
-
DGND5
62
DGND6
84
DGND7
87
AGND1
5
AGNDn: Analog Ground
AGND2
20
Ground
-
AGND3
GND_DIFF1
GND_DIFF2
GND_AMI
AGND
IC1
IC2
92
32
Ground
-
GND_DIFF: Ground for OUT6
38
Ground
-
GND_DIFF: Ground for OUT7
29
Ground
-
GND_AMI: Ground for AMI I/O
1
Ground
-
AGND: Analog Ground
Others
3
IC: Internal Connected
Internal Use. These pins should be left open for normal operation.
4
IC3
17
IC4
22
-
-
IC5
96
IC6
97
IC7
98
NC
44
-
-
NC: Not Connected
Note:
1. All the unused input pins should be connected to ground; the output of all the unused output pins are don’t-care.
2. The contents in the brackets indicate the position of the register bit/bits.
3. N x 8 kHz: 1 < N < 19440.
4. N x E1: N = 1, 2, 3, 4, 6, 8, 12, 16, 24, 32, 48, 64.
5. N x T1: N = 1, 2, 3, 4, 6, 8, 12, 16, 24, 32, 48, 64, 96.
6. N x 13.0 MHz: N = 1, 2, 4.
7. N x 3.84 MHz: N = 1, 2, 4, 8, 16, 10, 20, 40.
Pin Description
18
May 19, 2009
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