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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

IDT71V421L 데이터 시트보기 (PDF) - Integrated Device Technology

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IDT71V421L
IDT
Integrated Device Technology 
IDT71V421L Datasheet PDF : 14 Pages
First Prev 11 12 13 14
IDT71V321/71V421S/L
High Speed 3.3V 2K x 8 Dual-Port Static RAM with Interrupts
Industrial and Commercial Temperature Ranges
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage Range(1)
71V 321X 25
71V 421X 25
Com 'l
& Ind
71V 321X 35
71V 421X 35
Com 'l Only
71V 321X 55
71V 421X 55
Com 'l Only
Sym bol
Param eter
Min.
M ax.
Min.
M ax.
Min.
M ax. Unit
INTERRUPT TIMING
tAS
A d d re s s S et-up Tim e
0
____
0
____
0
____
ns
tWR
W rite Rec o v e ry Tim e
0
____
0
____
0
____
ns
tINS
Inte rrup t S e t Time
____
25
____
25
____
45
ns
tINR
Inte rrup t Re se t Time
____
25
____
25
____
45
ns
NOTES:
1. 'X' in part numbers indicates power rating (S or L).
3026 tbl 12
Timing Waveform of Interrupt Mode(1)
SET INT
ADDR"A"
R/W"A"
INT"B"
tWC
INTERRUPT ADDRESS (2)
tAS (3)
tWR(4)
tINS (3)
CLEAR INT
ADDR"B"
OE"B"
INT"A"
tRC
INTERRUPT CLEAR ADDRESS(2)
tAS(3)
tINR(3)
3026 drw 14
3026 drw 15
NOTES:.
1. All timing is the same for left and right ports. Port Amay be either left or right port. Port Bis the opposite from port A.
2. See Interrupt Truth Table.
3. Timing depends on which enable signal (CE or R/W) is asserted last.
4. Timing depends on which enable signal (CE or R/W) is de-asserted first.
61.412

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