IDT49C465APQF 데이터 시트보기 (PDF) - Integrated Device Technology
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IDT49C465APQF Datasheet PDF : 38 Pages
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IDT49C465/A
32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT
AC TIMING DIAGRAMS — DIAGNOSTIC TIMING
MILITARY AND COMMERCIAL TEMPERATURE RANGES
465
CBI
MD Bus
MLE
SCLKEN
SYNCLK
CLEAR
SD Bus
to
1
2
3
4
5
Parameter
Name
Propagation Delay
From
To
Min./
Max.
Checkbits In
t CSCS
Memory DataIN
t MSCS
t CSCS CBI Set-up to SYNCLK = High
t MSCS MDIN Set-up to SYNCLK = High
min.
t MLSCS
t MLSCS MLE = High Set-up to SYNCLK = High min.
t SESCS
t SESCH
t SESCS SCLKEN Set-up to SYNCLK = High min.
t SESCH SCLKEN = Hold After SYNCLK = High min.
t CLEAR
t SYNCLK
t SCS
t SYNCLK SCLKEN Pulse Width
min.
t SCS
SCLKEN = High to SDOUT
max.
t CLEAR CLEAR Pulse Width
min.
t CLR
t CLR
CLEAR = Low to SDOUT
max.
Valid DataOUT
to
1
2
3
4
5
Figure 15. 32-Bit Diagnostic Timing
2552 drw 27
11.7
36
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