ICS85214 데이터 시트보기 (PDF) - Integrated Circuit Systems
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ICS85214 Datasheet PDF : 16 Pages
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Integrated
Circuit
Systems, Inc.
ICS85214
LOW SKEW, 1-TO-5
DIFFERENTIAL-TO-HSTL FANOUT BUFFER
DIFFERENTIAL CLOCK INPUT INTERFACE
The CLK /nCLK accepts LVDS, LVPECL, HSTL, SSTL, HCSL
and other differential signals. Both VSWING and VOH must meet the
VPP and VCMR input requirements. Figures 3A to 3D show inter-
face examples for the ICS85214 clock input driven by the most
common driver types. The input interfaces suggested here are
examples only. Please consult with the vendor of the driver com-
ponent to confirm the driver termination requirements. For ex-
ample in Figure 3A, the input termination applies for ICS
HiPerClockS HSTL drivers. If you are using an HSTL driver from
another vendor, use their termination recommendations.
1.8V
Zo = 50 Ohm
Zo = 50 Ohm
LVHSTL
ICS
HiPerClockS
LVHSTL Driver
3.3V
CLK
nCLK HiPerClockS
Input
R1
R2
50
50
3.3V
Zo = 50 Ohm
LVPECL
Zo = 50 Ohm
3.3V
CLK
nCLK HiPerClockS
Input
R1
R2
50
50
R3
50
FIGURE 3A. HIPERCLOCKS CLK/NCLK INPUT DRIVEN BY
ICS HIPERCLOCKS LVHSTL DRIVER
FIGURE 3B. HIPERCLOCKS CLK/NCLK INPUT DRIVEN BY
3.3V LVPECL DRIVER
3.3V
Zo = 50 Ohm
LVPECL
Zo = 50 Ohm
3.3V
R3
R4
125
125
3.3V
CLK
nCLK HiPerClockS
Input
R1
R2
84
84
3.3V
Zo = 50 Ohm
LVDS_Driv er
R1
100
Zo = 50 Ohm
3.3V
CLK
nCLK Receiv er
FIGURE 3C. HIPERCLOCKS CLK/NCLK INPUT DRIVEN BY
3.3V LVPECL DRIVER
FIGURE 3D. HIPERCLOCKS CLK/NCLK INPUT DRIVEN BY
3.3V LVDS DRIVER
85214AG
www.icst.com/products/hiperclocks.html
8
REV. A JULY 17, 2003
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