HYS72T[256/128/64][0/2][0/2]0[G/H]R-[5/3.7]-A
Registered DDR2 SDRAM Modules
7.2 Raw Card B
Module Package
DDR2 Registered DIMM Modules Raw Card B
two one physical rank, 18 components x8 organised
1 3 3 .3 5 +- 0.15
Front View
4.0
PLL
pin 1
5,175
63,0
64 65
55,0
5.0
pin 121
Backside View
184 185
4.0 m ax.
120
5 ,1 7 5 1 .2 7 +- 0.1
PCB warpage 0.40
240
3
D etail of C ontacts A
0 .8 +- 0.05
1.0
3
Detail of Contacts B
5.0
0.75R
1 .5
2.5
note: all outline dimensions and tolerances are in accordance with the JEDEC standard (MO-237)
Data Sheet
Preliminary
28
Rev. 0.85, 2004-04