HMN1288DV 데이터 시트보기 (PDF) - Hanbit Electronics Co.,Ltd

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HMN1288DV

Non-Volatile SRAM Module 1Mbit (128K x 8-Bit), 32Pin-DIP, 3.3V

Hanbit Electronics Co.,Ltd 

HANBit

HMN1288DV

POWER-DOWN/POWER-UP CYCLE

PARAMETER

SYMBOL

CONDITIONS

MIN

VPFD(max) to VPFD(min) VCC Fail Time

tF

300

VPFD(max) to VSS VCC Fail Time

tFB

150

VPFD(max) to VPFD(min) VCC Rise Time

tR

10

Write Protect Time

Delay after Vcc slews down

tWPT

past VPFD before SRAM is

40

W rite-protected.

Chip Enable Recovery

tCER

40

VSS to VPFD (min) VCC Rise Time

tRB

1

TYP.

-

-

-

MAX

-

-

-

UNIT

µs

µs

µs

250

µs

-

120

ms

-

-

µs

TIMING WAVEFORM

- READ CYCLE NO.1 (Address Access)*1,2

Address

DOUT

tRC

tACC

tOH

Previous Data Valid

- READ CYCLE NO.2 (/CE Access)*1,3,4

tRC

CE

DOUT

tACE

tCLZ

High-Z

Data Valid

tCHZ

High-Z

URL : www.hbe.co.kr

6

Rev. 1.0 (June, 2004)

FinePrint pdfFactory 평 가 판 으 로 만 든 PDFhttp://www.softvision.co.kr

HANBit Electronics Co.,Ltd

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