
HI-8783, HI-8784, HI-8785
TIMING DIAGRAMS
DATA TRANSMISSION - EXAMPLE PATTERN
GAP
GAP
32 33
34 35
36
1
2
3
4
31
32
33 34
35 36
1
2
XMIT CLK
WRITE
XMT RDY
DATA ONE (HI-8783 only)
DATA ZERO (HI-8783 only)
ARINC 429 DATA (HI-8784 & HI-8785 only)
(TXAOUT-TXBOUT)
561 DATA
561 SYNC
LOW DURING CLK 8
DATA BUS
WRITE
A0
XMT RDY
TRANSMITTER OPERATION
BYTE 1 VALID
tSET
tHLD
tWPW
t WPD
BYTE 2 VALID
tASW
tAH
tASW
BYTE 4 VALID
t XD
HOLT INTEGRATED CIRCUITS
4