
MC54/74F168 • MC54/74F169
MC54/74F168
PE
P0
CEP
CET
LOGIC DIAGRAMS
P1
P2
P3
T
LD
AT
AF
TC
U/D
CP
UP
DN
CP
J CP K
Q
Q
Q
Q0
MC54/74F169
PE
P0
CEP
CET
LD T
BT
BF
UP
DN
DETAIL A
ENF
CP
Q
DETAIL A
DETAIL A
Q1
P1
Q2
P2
Q3
P3
T
LD
AT
AF
TC
U/D
CP
UP
DN
CP
J
CP K
Q
Q
Q
LD T
BT
BF
UP
DN
DETAIL A
ENF
CP
Q
DETAIL A
DETAIL A
NOTE:
Q0
Q1
Q2
Q3
These diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.
FAST AND LS TTL DATA
4-142