
Philips Semiconductors
4-bit synchronous binary counter with
asynchronous reset
Maximum clock
pulse frequency
VDD
V
SYMBOL MIN. TYP. MAX.
5
2,5
5
MHz
10
fmax
15
7
14
9
18
MHz
MHz
Product specification
HEF40161B
MSI
Conditions
PE = LOW
P0 to P3 = HIGH
Fig.5
Waveforms showing
minimum CP and MR pulse
widths and MR to CP
recovery time.
Condition: PE = MR = HIGH.
Fig.6
Waveforms
showing
set-up times
and hold
times for CEP
and CET
inputs.
January 1995
7