AD7656BSTZ-1-RL 데이터 시트보기 (PDF) - Analog Devices

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AD7656BSTZ-1-RL

250 kSPS, 6-Channel, Simultaneous Sampling, Bipolar, 16-/14-/12-Bit ADC

Analog Devices 

AD7656-1/AD7657-1/AD7658-1

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49

DB14/REFBUFEN/DIS 1

DB13 2

DB12 3

DB11 4

DB10/DOUT C 5

DB9/DOUT B 6

DB8/DOUT A 7

DGND 8

VDRIVE 9

DB7/HBEN/DCEN 10

DB6/SCLK 11

DB5/DCIN A 12

DB4/DCIN B 13

DB3/DCIN C 14

DB2/SEL C 15

DB1/SEL B 16

PIN 1

AD7656-1/AD7657-1/AD7658-1

TOP VIEW

(Not to Scale)

48 V6

47 AVCC

46 AVCC

45 V5

44 AGND

43 AGND

42 V4

41 AVCC

40 AVCC

39 V3

38 AGND

37 AGND

36 V2

35 AVCC

34 AVCC

33 V1

17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

Figure 3. Pin Configuration

Table 7. Pin Function Descriptions

Pin No.

Mnemonic

54, 56, 58

REFCAPA, REFCAPB,

REFCAPC

33, 36, 39,

42, 45, 48

V1 to V6

32, 37, 38, 43,

44, 49, 52, 53,

55, 57, 59

AGND

26

DVCC

9

8, 25

VDRIVE

DGND

34, 35, 40,

41, 46, 47,

50, 60

23, 22, 21

AVCC

CONVST A,

CONVST B, CONVST C

Description

Reference Capacitor A, Reference Capacitor B, and Reference Capacitor C. Decoupling capacitors are

connected to these pins to decouple the reference buffer for each ADC pair. Each REFCAP pin should be

decoupled to AGND using a 1 μF capacitor.

Analog Input 1 to Analog Input 6. These pins are single-ended analog inputs. In hardware mode,

the analog input range of these channels is determined by the RANGE pin. In software mode, it is

determined by the RNGC to RNGA bits of the control register (see Table 11).

Analog Ground. This pin is the ground reference point for all analog circuitry on the AD7656-1/

AD7657-1/AD7658-1. All analog input signals and external reference signals should be referred to

this pin. All AGND pins should be connected to the AGND plane of the system. The AGND and

DGND voltages should ideally be at the same potential and must not be more than 0.3 V apart, even

on a transient basis.

Digital Power, 4.75 V to 5.25 V. The DVCC and AVCC voltages should ideally be at the same potential

and must not be more than 0.3 V apart, even on a transient basis. This supply should be decoupled

to DGND by placing a 1 μF decoupling capacitor on the DVCC pin.

Logic Power Supply Input. The voltage supplied at this pin determines the operating voltage of the

interface. This pin is nominally at the same supply as the supply of the host interface.

Digital Ground. This is the ground reference point for all digital circuitry on the AD7656-1/AD7657-1/

AD7658-1. Both DGND pins should connect to the DGND plane of a system. The DGND and AGND

voltages should ideally be at the same potential and must not be more than 0.3 V apart, even on a

transient basis.

Analog Supply Voltage, 4.75 V to 5.25 V. This is the supply voltage for the ADC cores. The AVCC and

DVCC voltages should ideally be at the same potential and must not be more than 0.3 V apart, even

on a transient basis.

Conversion Start Input A, Conversion Start Input B, and Conversion Start Input C. These logic inputs

are used to initiate conversions on the ADC pairs. CONVST A is used to initiate simultaneous conversions

on V1 and V2. CONVST B is used to initiate simultaneous conversions on V3 and V4. CONVST C is

used to initiate simultaneous conversions on V5 and V6. When one of these pins switches from low

to high, the track-and-hold switch on the selected ADC pair switches from track to hold, and the

conversion is initiated. These inputs can also be used to place the ADC pairs into partial power-

down mode.

Rev. 0 | Page 11 of 32

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