AD7822BRUZ-REEL71 데이터 시트보기 (PDF) - Analog Devices

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AD7822BRUZ-REEL71

3 V/5 V, 2 MSPS, 8-Bit, 1-/4-/8-Channel Sampling ADCs

Analog Devices 

Gain Error

The deviation of the last code transition (1111 . . . 110) to

(1111 . . . 111) from the ideal, that is, VREF − 1 LSB, after the

offset error has been adjusted out.

Gain Error Match

The difference in gain error between any two channels.

Track-and-Hold Acquisition Time

The time required for the output of the track-and-hold amplifier to

reach its final value, within ±1/2 LSB, after the point at which the

track-and-hold returns to track mode. This happens approximately

120 ns after the falling edge of CONVST.

AD7822/AD7825/AD7829

It also applies to situations where a change in the selected input

channel takes place or where there is a step input change on the

input voltage applied to the selected VIN input of the AD7822/

AD7825/AD7829. It means that the user must wait for the

duration of the track-and-hold acquisition time after a channel

change/step input change to VIN before starting another

conversion, to ensure that the part operates to specification.

PSR (Power Supply Rejection)

Variations in power supply affect the full-scale transition but

not the converter linearity. Power supply rejection is the

maximum change in the full-scale transition point due to a

change in power supply voltage from the nominal value.

Rev. C | Page 9 of 28

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