CY7C1297A 데이터 시트보기 (PDF) - Cypress Semiconductor

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CY7C1297A

64K X 18 Synchronous Burst SRAM

Cypress Semiconductor 

CY7C1297A/

GVT7164B18

Functional Block Diagram—64Kx18[1]

WEH#

BWE#

CLK

WEL#

GW#

UPPER BYTE

WRITE

DQ

LOWER BYTE

WRITE

DQ

CE#

CE2

CE2#

ZZ

OE#

Power-down Logic

ENABLE

DQ

ADSP#

Input

Register

A15-A2

ADSC#

Address

Register

ADV#

A1-A0

MODE

CLR

Binary

Counter

and Logic

DQ1-DQ16

DQP1

DQP2

Note:

1. The functional block diagram illustrates simplified device operation. See Truth Table, pin descriptions, and timing diagrams for detailed information.

Document #: 38-05204 Rev. *A

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