CY14B101KA(2011) 데이터 시트보기 (PDF) - Cypress Semiconductor
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CY14B101KA Datasheet PDF : 34 Pages
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CY14B101KA
CY14B101MA
Pin Definitions
Pin Name I/O Type
Description
A0–A16
A0–A15
DQ0–DQ7
DQ0–DQ15
NC
Input
Input/Output
No connect
Address inputs. Used to select one of the 131,072 Bytes of the nvSRAM for × 8 configuration.
Address inputs. Used to select one of the 65,536 Words of the nvSRAM for × 16 configuration.
Bidirectional data I/O Lines for × 8 configuration. Used as input or output lines depending on operation.
Bidirectional data I/O Lines for × 16 configuration. Used as input or output lines depending on operation.
No connects. This pin is not connected to the die.
WE
Input
Write Enable input, Active LOW. When the chip is enabled and WE is LOW, data on the I/O pins is written
to the specific address location.
CE
Input Chip Enable input, Active LOW. When LOW, selects the chip. When HIGH, deselects the chip.
OE
Input
Output Enable, Active LOW. The active LOW OE input enables the data output buffers during read cycles.
Deasserting OE HIGH causes the I/O pins to tristate.
BHE
BLE
Xout
Xin
VRTCcap
VRTCbat
INT
Input
Input
Output
Byte High Enable, Active LOW. Controls DQ15–DQ8.
Byte Low Enable, Active LOW. Controls DQ7–DQ0.
Crystal connection. Drives crystal on start up.
Input Crystal connection. For 32.768 kHz crystal.
Power supply Capacitor supplied backup RTC supply voltage. Left unconnected if VRTCbat is used.
Power supply Battery supplied backup RTC supply voltage. Left unconnected if VRTCcap is used.
Output
Interrupt output. Programmable to respond to the clock alarm, the watchdog timer, and the power
monitor. Also programmable to either active HIGH (push or pull) or LOW (open drain).
VSS
VCC
HSB
Ground Ground for the device. Must be connected to the ground of the system.
Power supply Power supply inputs to the device. 3.0 V +20%, –10%
Input/Output Hardware STORE Busy (HSB). When LOW this output indicates that a Hardware STORE is in progress.
When pulled LOW external to the chip it initiates a nonvolatile STORE operation. After each Hardware
and Software STORE operation HSB is driven HIGH for short time (tHHHD) with standard output high
current and then weak internal pull-up resistor keeps this pin HIGH (External pull-up resistor connection
optional).
VCAP
Power supply AutoStore capacitor. Supplies power to the nvSRAM during power loss to store data from SRAM to
nonvolatile elements.
Document #: 001-42880 Rev. *I
Page 4 of 34
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