CX28342/3/4/6/8 Data Sheet
Product Description
Table 1-4. Transmitter Section System Side (1 of 2)
Pin Label CX28342 Pin # CX28343 Pin # CX28344 Pin # Signal Name I/O
Definition
TXDATI1
132
132
TXDATI2
40
40
132
Framers 1
IPD TXDATI is serial data input to
Transmit Serial
framer transmitter. The serial
Data Input
data is sampled on the falling
40
Framers 2
IPD edge of TXCKI input clock.
Transmit Serial
Data Input
TXDATI3
—
118
TXDATI4
—
—
TXSY1
130
130
TXSY2
38
38
TXSY3
—
115
TXSY4
—
—
118
Framers 3
IPD
Transmit Serial
Data Input
57
Framers 4
IPD
Transmit Serial
Data Input
130
Framers 1
IOZPD Framer transmit frame
Transmit Sync
synchronization indicator. The
38
Framers 2
Transmit Sync
IOZPD
sync signal can be
programmed to be generated
internally (the pin used as
115
Framers 3
IOZPD output) or supplied from
Transmit Sync
external circuit (the pin used
as input). After reset, it has a
55
Framers 4
IOZPD high-Z value.
Transmit Sync
TXCKI1
131
131
TXCKI2
39
39
TXCKI3
—
117
131
Framers 1
I Used to clock in serial data
Transmit Clock
TXDATI in serial mode. The
In
sync and data inputs are
39
Framers 2
Transmit Clock
I
sampled on the falling edge.
DS3 Mode Clock = 44.736
MHz E3-G.751/G.832 Mode
In
Clock = 34.368 MHz
117
Framers 3
I
Transmit Clock
In
TXCKI4
—
—
56
Framers 4
I
Transmit Clock
In
TXGAPCK1
133
133
TXGAPCK2
44
44
TXGAPCK3
—
121
133
Framers 1
O/Z A gapped clock is derived
Transmit
from the falling edge of TXCKI
Gapped Clock
clock. It is gapped during
44
Framers 2
Transmit
Gapped Clock
O/Z
Overhead bits that are not
selected to be inserted with
payload on TXDATI. Its
polarity is programmable.
121
Framers 3
O/Z
Transmit
Gapped Clock
TXGAPCK4
—
—
58
Framers 4
O/Z
Transmit
Gapped Clock
28348-DSH-001-B
Mindspeed Technologies™
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