74LVT16500ADGG(2006) 데이터 시트보기 (PDF) - Philips Electronics
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74LVT16500ADGG Datasheet PDF : 19 Pages
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Philips Semiconductors
74LVT16500A
3.3 V 18-bit universal bus transceiver; 3-state
Table 7. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 11.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
th(H)
hold time HIGH
An to CPAB or Bn to CPBA
see Figure 10
0
0
-
ns
An to LEAB or Bn to LEBA
see Figure 10
0
0
-
ns
th(L)
hold time LOW
An to CPAB or Bn to CPBA
see Figure 10
0
0
-
ns
An to LEAB or Bn to LEBA
see Figure 10
0
0
-
ns
tWH
pulse width HIGH
CPAB or CPBA
see Figure 6
1.2
0.8
-
ns
LEAB or LEBA
see Figure 7
1.2
0.8
-
ns
tWL
pulse width LOW
CPAB or CPBA
see Figure 6
1.2
0.8
-
ns
fmax
maximum input clock frequency see Figure 6
150
350
-
MHz
[1] All typical values are measured at VCC = 3.3 V and Tamb = 25 °C.
11. Waveforms
VI
input
An or Bn
0V
VOH
output
Bn or An
VOL
VM
t PLH
VM
VM
t PHL
VM
001aad 308
Fig 5.
Measurements points are given in Table 8.
VOL and VOH are typical voltage output drop that occur with the output load.
Propagation delay input (An, Bn) to output (Bn, An) in transparent mode
74LVT16500A_3
Product data sheet
Rev. 03 — 29 May 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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