DM74S374WM 데이터 시트보기 (PDF) - Fairchild Semiconductor
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DM74S374WM
Fairchild Semiconductor
DM74S374WM Datasheet PDF : 7 Pages
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Truth Tables
DM74S373
Output
Enable
D
Output
Control
G
L
H
H
H
L
H
L
L
L
L
X
Q0
H
X
X
Z
H = HIGH Level (Steady State)
L = LOW Level (Steady State)
X = Don’t Care
Z = High Impedance State
↑ = Transition from LOW-to-HIGH level,
Q0 = The level of the output before steady-state input conditions were
established.
Logic Diagrams
74S373
Transparent Latches
Output
Control
L
L
L
H
DM74S374
Clock
D
↑
H
↑
L
L
X
X
X
Output
H
L
Q0
Z
74S374
Positive-Edge-Triggered Flip-Flops
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