
Connection Diagrams
MM74C373
MM74C374
Top View
Truth Tables
MM74C373
Output
LATCH
D
Disable
ENABLE
L
H
H
L
H
L
L
L
X
H
X
X
L = LOW logic level
H = HIGH logic level
X = Irrelevant
Top View
Q
H
L
Q
Hi-Z
MM74C374
Output
Clock
D
Disable
L
H
L
L
L
L
X
L
H
X
H
X
X
= LOW-to-HIGH logic level transition
Q = Preexisting output level
Hi-Z = High impedance output state
Q
H
L
Q
Q
Hi-Z
www.fairchildsemi.com
2