AS7C4098A-15JCN 데이터 시트보기 (PDF) - Alliance Semiconductor

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AS7C4098A-15JCN

5.0 V 256 K × 16 CMOS SRAM

Alliance Semiconductor 

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Revision History

Rev. No.

History

v1.0 Initial release

Included ICC, ISB & ISB1 parameters

v1.1

Corrected the following: TOE, VIH, VOL & tWZ

v1.2 Removed the title “PRELIMINARY INFORMATION”

AS7C4098A

Revised Date

11/08/04

05/27/05

02/21/06

2/21/06, v 1.2

Alliance Semiconductor

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