PRELIMINARY
SWITCHING WAVEFORMS (continued)
CLK
TCLK
SELO
ACK
COL
DAT/JAM
tCLKHRL
tCLKHRH
tCASET
IN
tCASET
tCAHLD
IN
Note: TCLK represents internal eIMR timing
Figure 20. Expansion Bus Collision Timing
20650B-25
20650A-26
CLK
DO+
DO –
tDOTD
tDOTR
tDOETD
tDOTF
Figure 21. AUI Timing Diagram
DI+
(CI±)
VASQ
tPWODI
(tPWOCI)
tPWKDI
(tPWKCI)
tPWKDI
(tPWKCI)
Figure 22. AUI Receive Diagram
Am79C984A
20650B-26
20650A-28
20650B-27
39