ADT7316(RevPrN) 데이터 시트보기 (PDF) - Analog Devices
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ADT7316
(Rev.:RevPrN)
(Rev.:RevPrN)
Analog Devices
ADT7316 Datasheet PDF : 32 Pages
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PRELIMINARY TECHNICAL DATA
ADT7316/7317/7318
2.25
2.10
1.95
0 V = -128'C
1.80
0 V = -40'C
1.65
1.50
1.35
1.20
1.05
0.90
0.75
0.60
0.45
0 V = 0'C
0.30
0.15
0.00
-128 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 127
Temperature ('C)
Figure 14. DAC Output vs Temperature, VREF = 2.25 V
ADT7316/7317/7318 REGISTERS
The ADT7316/17/18 contains registers that are used to
store the results of external and internal temperature mea-
surements, VDD value measurements, high and low tem-
perature and supply voltage limits, set output DAC
voltage levels, configure multipurpose pins and generally
control the device. A description of these registers follows.
The register map is divided into registers of 8-bits long.
Each register has it’s own indvidual address but some
consist of data that is linked with other registers. These
registers hold the 10-bit conversion results of measure-
ments taken on the Temperature and VDD channels. For
example, the 8 MSBs of the VDD measurement are stored
in register address 06h while the 2 LSBs are stored in
register address 03h. The link involved between these
types of registers is that when the LSB register is read first
then the MSB registers associated with that LSB register
are locked to prevent any updates. To unlock these MSB
registers the user has only to read any one of them, which
will have the affect of unlocking all previously locked
MSB registers. So for the example given above if register
03h was read first then MSB registers 06h and 07h would
be locked to prevent any updates to them. If register 06h
was read then this register and register 07h would be sub-
sequently unlocked.
1st READ
COMM AND
LSB
REGISTER
O UTP UT
DATA
LOCK ASSOCIATED
MSB REGISTERS
Figure 15. Phase 1 of 10-Bit Read
2nd READ
COMM AND
MSB
REGISTER
O UTP UT
DATA
UNLOCK ASSOCIATED
MSB REGISTERS
Figure 16. Phase 2 of 10-Bit Read
If an MSB register is read first, it’s corresponding LSB
register is not locked thus leaving the user with the option
of just reading back 8 bits (MSB) of a 10-bit conversion
result. Reading an MSB register first does not lock up
other MSB registers and likewise reading an LSB register
first does not lock up other LSB registers.
Table 6. List of ADT7316/7317/7318 Registers
RD/WR
Address
Name
Power-on
Default
00h
Interrupt Status 1
00h
01h
Interrupt Status 2
00h
02h
RESERVED
03h
Internal Temp & VDD LSBs
00h
04h
External Temp LSBs
00h
05h
RESERVED
06h
VDD MSBs
00h
07h
Internal Temperature MSBs
00h
08h
External Temp MSBs
00h
09h-0Fh
RESERVED
10h
DAC A LSBs (ADT7316/17 only)
00h
11h
DAC A MSBs
00h
12h
DAC B LSBs (ADT7316/17 only)
00h
13h
DAC B MSBs
00h
14h
DAC C LSBs (ADT7316/17 only)
00h
15h
DAC C MSBs
00h
16h
DAC D LSBs (ADT7316/17 only)
00h
17h
DAC D MSBs
00h
18h
Control CONFIG 1
00h
19h
Control CONFIG 2
00h
1Ah
Control CONFIG 3
00h
1Bh
DAC CONFIG
00h
1Ch
LDAC CONFIG
00h
1Dh
Interrupt Mask 1
00h
1Eh
Interrput Mask 2
00h
1Fh
Internal Temp Offset
00h
20h
External Temp Offset
00h
21h
Internal Analog Temp Offset
D8h
–20–
REV. PrN
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