ADP3188 데이터 시트보기 (PDF) - Analog Devices
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ADP3188 Datasheet PDF : 28 Pages
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THEORY OF OPERATION
The ADP3188 combines a mulitmode, fixed frequency PWM
control with mulitphase logic outputs for use in 2-, 3-, and
4 - phase synchronous buck CPU core supply power converters.
The internal VID DAC is designed to interface with the Intel
6-bit VRD/VRM 10-and 10.1-compatible CPUs. Multiphase
operation is important for producing the high currents and low
voltages demanded by today’s microprocessors. Handling the
high currents in a single-phase converter places high thermal
demands on the components in the system, such as
the inductors and MOSFETs.
The multimode control of the ADP3188 ensures a stable, high
performance topology for
• Balancing currents and thermals between phases
• High speed response at the lowest possible switching
frequency and output decoupling
• Minimizing thermal switching losses due to lower
frequency operation
• Tight load line regulation and accuracy
• High current output for up to 4-phase operation
• Reduced output ripple due to multiphase cancellation
• PC board layout noise immunity
• Ease of use and design due to independent component
selection
• Flexibility in operation for tailoring design to low cost or
high performance
START-UP SEQUENCE
During start-up, the number of operational phases and their
phase relationship is determined by the internal circuitry that
monitors the PWM outputs. Normally, the ADP3188 operates
as a 4-phase PWM controller. Grounding the PWM4 pin pro-
grams 3-phase operation, and grounding the PWM3 and
PWM4 pins programs 2-phase operation.
When the ADP3188 is enabled, the controller outputs a voltage
on PWM3 and PWM4, which is approximately 675 mV. An
internal comparator checks each pin’s voltage vs. a threshold of
300 mV. If the pin is grounded, it is below the threshold, and the
phase is disabled. The output resistance of the PWM pin is
approximately 5 kΩ during this detection time. Any external
pull-down resistance connected to the PWM pin should not be
less than 25 kΩ to ensure proper operation. PWM1 and PWM2
are disabled during the phase detection interval, which occurs
during the first two clock cycles of the internal oscillator. After
this time, if the PWM output is not grounded, the 5 kΩ
resistance is removed, and it switches between 0 V and 5 V.
If the PWM output is grounded, it remains off.
ADP3188
The PWM outputs are logic-level devices intended for driving
external gate drivers such as the ADP3418. Because each phase
is monitored independently, operation approaching 100% duty
cycle is possible. Also, more than one output can be on at the
same time for overlapping phases.
MASTER CLOCK FREQUENCY
The clock frequency of the ADP3188 is set with an external
resistor connected from the RT pin to ground. The frequency
follows the graph in Figure 6. To determine the frequency per
phase, the clock is divided by the number of phases in use. If
PWM4 is grounded, divide the master clock by 3 for the fre-
quency of the remaining phases. If PWM3 and 4 are grounded,
divide by 2. If all phases are in use, divide by 4.
OUTPUT VOLTAGE DIFFERENTIAL SENSING
The ADP3188 combines differential sensing with a high accuracy
VID DAC and reference and a low offset error amplifier. This
maintains a worst-case specification of ±9.5 mV differential
sensing error over its full operating output voltage and tem-
perature range. The output voltage is sensed between the
FB and FBRTN pins. FB should be connected through a resistor
to the regulation point, usually the remote sense pin of the
microprocessor. FBRTN should be connected directly to the
remote sense ground point. The internal VID DAC and
precision reference are referenced to FBRTN, which has a
minimal current of 100 µA to allow accurate remote sensing.
The internal error amplifier compares the output of the DAC
to the FB pin to regulate the output voltage.
OUTPUT CURRENT SENSING
The ADP3188 provides a dedicated current-sense amplifier
(CSA) to monitor the total output current for proper voltage
positioning vs. load current and for current-limit detection.
Sensing the load current at the output gives the total average
current being delivered to the load, which is an inherently more
accurate method than peak current detection or sampling the
current across a sense element, such as the low-side MOSFET.
This amplifier can be configured several ways depending on the
objectives of the system:
• Output inductor DCR sensing without a thermistor for
lowest cost
• Output inductor DCR sensing with a thermistor for
improved accuracy with tracking of inductor temperature
• Sense resistors for highest accuracy measurements
Rev. A | Page 9 of 28
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