ADL5570
EVALUATION BOARD
Preliminary Technical Data
Figure 11. Evaluation Board Layout
The ADL5570 perfomance data were taken on a FR4 board layout. Care should be taken to ensure 50Ω impedance for all RF traces. For
optimal performance in linearity, gain and efficiency, the output matching capacitor, C3, should be placed 30 mils from the edge of the
package.
Rev. PrG | Page 8 of 10