ADG5213(Rev0) 데이터 시트보기 (PDF) - Analog Devices
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ADG5213 Datasheet PDF : 20 Pages
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ADG5212/ADG5213
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
IN1 1
16 IN2
D1 2
15 D2
S1 3 ADG5212/ 14 S2
VSS 4 ADG5213 13 VDD
GND 5 TOP VIEW 12 NC
(Not to Scale)
S4 6
11 S3
D4 7
10 D3
IN4 8
9 IN3
NC = NO CONNECT
Figure 2. TSSOP Pin Configuration
S1 1
VSS 2
GND 3
S4 4
ADG5212/
ADG5213
TOP VIEW
(Not to Scale)
12 S2
11 VDD
10 NC
9 S3
NOTES
1. EXPOSED PAD TIED TO SUBSTRATE, VSS.
2. NC = NO CONNECT.
Figure 3. LFCSP Pin Configuration
Table 7. Pin Function Descriptions
Pin No.
TSSOP
LFCSP
Mnemonic
1
15
IN1
2
16
D1
3
1
S1
4
2
VSS
5
3
GND
6
4
S4
7
5
D4
8
6
IN4
9
7
IN3
10
8
D3
11
9
S3
12
10
NC
13
11
VDD
14
12
S2
15
13
D2
16
14
IN2
N/A1
EP
Exposed pad
1 N/A means not applicable.
Table 8. ADG5212 Truth Table
ADG5212 INx
1
0
Description
Logic Control Input.
Drain Terminal. This pin can be an input or an output.
Source Terminal. This pin can be an input or an output.
Most Negative Power Supply Potential.
Ground (0 V) Reference.
Source Terminal. This pin can be an input or an output.
Drain Terminal. This pin can be an input or an output.
Logic Control Input.
Logic Control Input.
Drain Terminal. This pin can be an input or an output.
Source Terminal. This pin can be an input or an output.
No Connect. These pins are open.
Most Positive Power Supply Potential.
Source Terminal. This pin can be an input or an output.
Drain Terminal. This pin can be an input or an output.
Logic Control Input.
Exposed Pad. The exposed pad is connected internally. For increased reliability of the
solder joints and maximum thermal capability, it is recommended that the pad be
soldered to the substrate, VSS.
Switch Condition
On
Off
Table 9. ADG5213 Truth Table
ADG5213 INx
0
1
S1, S4
Off
On
S2, S3
On
Off
Rev. 0 | Page 9 of 20
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