ADE7752BARW-RL 데이터 시트보기 (PDF) - Analog Devices
부품명
상세내역
제조사
ADE7752BARW-RL Datasheet PDF : 27 Pages
| |||
Preliminary Technical Data
ADE7752B
Example 3
In this example, the ADE7752B is connected to a 3-phase 3-
wire delta service as shown in Figure 21. The total active energy
calculation processed in the ADE7752B can be expressed as
Total Active Power = (VA – VC) × IA + (VB – VC) × IB
Note that if the on-chip reference is used, actual output
frequencies can vary from device to device due to reference
tolerance of ±8%.
Freq
=
2
×
6.181× 0.5 × 0.5 × 0.60
2 × 2 × 2.42
×
3 = 0.139 Hz
2
(20)
where:
VA, VB, and VC represent the voltage on phase A, phase B, and
phase C, respectively.
IA and IB represent the current on phase A and phase B,
respectively.
As the voltage and current inputs respect Equations 5 and 6, the
total active power (P) is
P = (VA −VC) (IAP − IAN ) + (VB −VC)× (IBP − IBN )
P = ⎜⎛
⎝
2 ×VA × cos(ωlt ) −
2 × VC
× cos⎜⎝⎛ ωlt +
4π
3
⎟⎠⎞ ⎟⎠⎞
(15)
× 2 × I A × cos(ωlt )
+ ⎜⎛
⎝
2
×VB
× cos⎜⎝⎛ ωlt
+
2π
3
⎟⎠⎞
−
v
2
×
VC
×
cos⎜⎝⎛ ωlt
+
4π
3
⎟⎠⎞ ⎟⎠⎞
×
2
×
IB
×
cos⎜⎝⎛ ωlt
+
2π
3
⎟⎠⎞
Table 6 shows a complete listing of all maximum output
frequencies when using all three channel inputs.
Table 6: Maximum Output Frequency on F1 and F2
Maximum
Frequency for AC
SCF S1 S0 Inputs (Hz)
Maximum
Frequency for DC
Inputs (Hz)
0
0 0 0.93
1.85
1
0 1 1.86
3.71
0
0 1 0.46
0.93
1
0 1 1.86
3.71
0
1 0 2.10
4.20
1
1 0 0.46
0.93
0
1 1 0.23
0.47
1
1 1 0.23
0.47
FREQUENCY OUTPUT CF
For simplification, assume that ΦA = ΦB = ΦC = 0 and
VA = VB = VC = V. The preceding equation becomes
P
=
2×V
×
I
A
× sin⎜⎝⎛
2π
3
⎟⎠⎞× sin⎜⎝⎛ ωlt
+
2π
3
⎟⎠⎞× cos(ωlt )
(16)
+
2
×
V
×
I
B
×
sin⎜⎝⎛
π
3
⎟⎠⎞
×
sin(ωl
t
+
π)×
cos⎜⎝⎛
ωl
t
+
2π
3
⎟⎠⎞
P then becomes
P
=
VAN
×
I
A
×
⎜⎛
⎝
sin⎜⎝⎛
2π
3
⎟⎠⎞
+
sin⎜⎝⎛
2ωl
t
+
2π
3
⎟⎠⎞ ⎟⎠⎞
(17)
+
VBN
×
I
B
×
⎜⎛
⎝
sin⎜⎝⎛
π
3
⎟⎠⎞
+
sin⎜⎝⎛ 2ωl t
+
π
3
⎟⎠⎞
⎟⎞
⎠
where:
The pulse output calibration frequency (CF) is intended for use
during calibration. The output pulse rate on CF can be up to 64×
the pulse rate on F1 and F2. Table 7 shows how the two
frequencies are related, depending on the states of the logic
inputs S0, S1, and SCF. Because of its relatively high pulse rate,
the frequency at this logic output is proportional to the
instantaneous active power. As is the case with F1 and F2, the
frequency is derived from the output of the low-pass filter after
multiplication. However, since the output frequency is high, this
active power information is accumulated over a much shorter
time. Thus, less averaging is carried out in the digital-to-
frequency conversion. The CF output is much more responsive
to power fluctuations with much less averaging of the active
power signal (see Figure 15).
VAN = V × sin(2π/3).
VBN = V × sin(π/3).
As the LPF on each channel eliminates the 2ωl component of
the equation, the active power measured by the ADE7752B is
P = VAN × I A ×
3
2
+ VBN
×
I
B
×
3
2
(18)
If full-scale ac voltage of ±500 mV peak is applied to the voltage
channels and current channels, the expected output frequency
is calculated as follows:
Table 7. Maximum Output Frequency on CF
SCF S1 S0 F1–7 (Hz) CF Maximum for AC Signals (Hz)
0
0 0 2.3
16 × F1, F2 = 14.88
1
0 0 4.61
8 × F1, F2 = 14.88
0
0 1 1.15
32 × F1, F2 = 14.88
1
0 1 4.61
16 × F1, F2 = 29.76
0
1 0 5.22
160 × F1, F2 = 336
1
1 0 1.15
16 × F1, F2 = 7.36
0
1 1 0.58
32 × F1, F2 = 7.36
1
1 1 0.58
16 × F1, F2 = 3.68
F1−7 = 0.60Hz, SCF = S0 = S1 = 1
VAN = VBN = IA = IB = IC = 500 mV peak ac = 0.5 V rms
2
VCN = IC = 0
VREF = 2.4V nominal reference value
(19)
Rev. PrA | Page 23 of 27
Share Link: 