AD9877 데이터 시트보기 (PDF) - Analog Devices
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AD9877 Datasheet PDF : 37 Pages
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AD9877
SPECIFICATIONS
VAS = 3.3 V ± 5%, VDS = 3.3 V ± 10%, fOSCIN = 27 MHz, fSYSCLK = 216 MHz, fMCLK = 54 MHz (M = 8 and N = 4). ADC sample frequencies
derived from PLL (fMCLK), RSET = 4.02 kΩ, maximum fine gain, 75 Ω DAC load.
Table 1.
Parameter
SYSTEM CLOCK DAC SAMPLING, fSYSCLK
Frequency Range (N = 4)
Frequency Range (N = 3)
OSCIN and XTAL CHARACTERISTICS
Frequency Range
Duty Cycle
Input Impedance
MCLK JITTER
Cycle to Cycle (fMCLK derived from PLL)
Tx DAC CHARACTERISTICS
Resolution
Full-Scale Output Current
Gain Error (using internal reference)
Offset Error
Reference Voltage (REFIO Level)
Differential Nonlinearity (DNL)
Integral Nonlinearity (INL)
Output Capacitance
Phase Noise @ 1 kHz Offset, 42 MHz Carrier
Output Voltage Compliance Range
Wideband SFDR
5 MHz Analog Out, IOUT = 10 mA
65 MHz Analog Out, IOUT = 10 mA
Narrow-Band SFDR (±1 MHz Window)
65 MHz Analog Out, IOUT = 10 mA
Tx MODULATOR CHARACTERISTICS
I/Q Offset
Pass-Band Amplitude Ripple (f < fIQCLK/8)
Pass-Band Amplitude Ripple (f < fIQCLK/4)
Stop-Band Response (f > fIQCLK × 3/4)
Tx GAIN CONTROL
Gain Step Size
Gain Step Error
Settling Time, 1% (Full-Scale Step)
8-BIT ADC CHARACTERISTICS
Resolution
Conversion Rate
Pipeline Delay
Offset Matching Between I and Q ADCs
Gain Matching Between I and Q ADCs
Analog Input
Input Voltage Range
Differential Input Impedance
Full Power Bandwidth
Input Referred Noise
Test
Temp Level
Min
Full II
Full II
Full II
3
25°C II
35
25°C III
25°C III
N/A N/A
Full II
4
Full I
−2.5
25°C I
25°C I
1.18
25°C III
25°C III
25°C III
25°C III
Full II
−0.5
Full II
48
Full II
48
Full II
53
Full II
50
Full II
Full II
Full II
25°C III
25°C III
25°C III
N/A N/A
Full II
N/A N/A
Full II
25°C III
25°C III
25°C III
Typ
Max
232
177
33
50
65
100||3
6
12
10
20
−1
+2.5
±1.0
1.23
1.28
±2.5
±8
5
−110
+1.5
55
51
69
55
±0.1
±0.5
−63
0.5
0.05
1.8
8
16.5
3.5
±8.0
±2.0
1
4||2
90
600
Unit
MHz
MHz
MHz
%
MΩ||pF
ps rms
Bits
mA
% FS
% FS
V
LSB
LSB
pF
dBc/Hz
V
dBc
dBc
dBc
dB
dB
dB
dB
dB
dB
μs
Bits
MHz
ADC cycles
LSBs
LSBs
Vppd
kΩ||pF
MHz
μV
Rev. B | Page 4 of 36
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