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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

AD9251BCPZ-40 데이터 시트보기 (PDF) - Analog Devices

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AD9251BCPZ-40 Datasheet PDF : 37 Pages
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AD9251
Data Sheet
SPECIFICATIONS
DC SPECIFICATIONS
AVDD = 1.8 V; DRVDD = 1.8 V, maximum sample rate, 2 V p-p differential input, 1.0 V internal reference; AIN = −1.0 dBFS,
DCS disabled, unless otherwise noted.
Table 1.
Parameter
RESOLUTION
ACCURACY
No Missing Codes
Offset Error
Gain Error1
Differential Nonlinearity (DNL)2
Integral Nonlinearity (INL)2
MATCHING CHARACTERISTICS
Offset Error
Gain Error1
TEMPERATURE DRIFT
Offset Error
INTERNAL VOLTAGE REFERENCE
Output Voltage (1 V Mode)
Load Regulation Error at 1.0 mA
INPUT-REFERRED NOISE
VREF = 1.0 V
ANALOG INPUT
Input Span, VREF = 1.0 V
Input Capacitance3
Input Common-Mode Voltage
Input Common-Mode Range
REFERENCE INPUT RESISTANCE
POWER SUPPLIES
Supply Voltage
AVDD
DRVDD
Supply Current
IAVDD2
IDRVDD2 (1.8 V)
IDRVDD2 (3.3 V)
POWER CONSUMPTION
DC Input
Sine Wave Input2 (DRVDD = 1.8 V)
Sine Wave Input2 (DRVDD = 3.3 V)
Standby Power4
Power-Down Power
Temp
Full
AD9251-20/AD9251-40
Min Typ
Max
14
Full
Guaranteed
Full
±0.1
±0.70
Full
−1.5
Full
±0.60
25°C
±0.3
Full
±1.75
25°C
±0.6
25°C
±0.0
±0.65
25°C
±0.2
Full
±2
Full 0.981 0.993
Full
2
1.005
25°C
0.98
Full
2
Full
6
Full
0.9
Full 0.5
1.3
Full
7.5
AD9251-65
AD9251-80
Min Typ Max Min Typ Max Unit
14
14
Bits
Guaranteed
±0.1 ±0.50
−1.5
±0.75
±0.45
±1.75
±0.6
Guaranteed
±0.1 ±0.70
−1.5
±0.70
±0.45
±2.50
±1.0
% FSR
% FSR
LSB
LSB
LSB
LSB
±0.0 ±0.65
±0.2
±0.0 ±0.65 % FSR
±0.2
% FSR
±2
±2
ppm/°C
0.981 0.993 1.005 0.981 0.993 1.005 V
2
2
mV
0.98
0.98
LSB rms
2
2
V p-p
6
6
pF
0.9
0.9
V
0.5
1.3 0.5
1.3 V
7.5
7.5
kΩ
Full 1.7 1.8
1.9
Full 1.7
3.6
1.7 1.8 1.9 1.7 1.8 1.9 V
1.7
3.6 1.7
3.6 V
Full
36.5/49.5 39.4/52.8
69.0 72.9
80.5 85.5 mA
Full
3.4/5.6
8.4
10.3
mA
Full
6.3/10.6
16.0
19.5
mA
Full
66/89
125
145
mW
Full
71.8/99 77.0/105.5
139.0 146.5
163.4 173 mW
Full
86.5/124
176.7
209
mW
Full
37
37
37
mW
Full
2.2
2.2
2.2
mW
1 Measured with 1.0 V external reference.
2 Measured with a 10 MHz input frequency at rated sample rate, full-scale sine wave, with approximately 5 pF loading on each output bit.
3 Input capacitance refers to the effective capacitance between one differential input pin and AGND.
4 Standby power is measured with a dc input and the CLK active.
Rev. B | Page 4 of 36

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