AD818
A HIGH SPEED, THREE OP AMP IN AMP
The circuit of Figure 41 uses three high speed op amps: two
AD818s and an AD817. This high speed circuit lends itself well
to CCD imaging and other video speed applications. It has the
optional flexibility of both dc and ac trims for common-mode
rejection, plus the ability to adjust for minimum settling time.
+15V
10µF
COMMON
10µF
–15V
EACH
AMPLIFIER PIN 7
+VS
EACH
0.1µF 1µF
AMPLIFIER
0.1µF
0.1µF 1µF
–VS
0.1µF
PIN 4
EACH
AMPLIFIER
–VIN
2pF
+VIN
A1
AD818
1k⍀
5pF
RG
5pF
1k⍀
A2
AD818
SETTLING
2-8 pF
TIME A.C.
CMR ADJUST
1k⍀
1k⍀
A3
1k⍀
AD817
3pF
970⍀
50⍀
D.C. CMR
ADJUST
VOUT
RL
2k⍀
BANDWIDTH, SETTLING TIME, & TOTAL HARMONIC DISTORTION VS. GAIN
GAIN
3
10
100
SMALL
CADJ SIGNAL
RG (pF) BANDWIDTH
1k⍀ 2-8
222⍀ 2-8
20⍀ 2-8
14.7 MHz
4.5 MHz
960 kHz
SETTLING
TIME
TO 0.1%
200ns
370ns
2.5µs
THD + NOISE
BELOW INPUT LEVEL
@ 10kHz
82 dB
81 dB
71 dB
Figure 41. High Speed 3 Op Amp In Amp
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Plastic Mini-DIP (N) Package
8
PIN 1
1
5
0.25
(6.35) 0.31
(7.87)
4
0.39 (9.91) MAX
0.165±0.01
(4.19±0.25)
0.035±0.01
(0.89±0.25)
0.125
(3.18)
MIN
0.18±0.03
(4.57±0.76)
0.018±0.003 0.10
(0.46±0.08) (2.54)
BSC
0.033
(0.84)
NOM
SEATING
PLANE
0.30 (7.62)
REF
0.011±0.003
(0.28±0.08)
15°
0°
8-Lead SOIC (R) Package
0.1968 (5.00)
0.1890 (4.80)
8
0.1574 (4.00)
0.1497 (3.80) 1
5
0.2440 (6.20)
4 0.2284 (5.80)
PIN 1
0.0500 (1.27)
BSC
0.0196 (0.50)
0.0099 (0.25) ؋ 45؇
0.0098 (0.25)
0.0040 (0.10)
SEATING
PLANE
0.0688 (1.75)
0.0532 (1.35)
8؇
0.0192 (0.49)
0.0098 (0.25) 0؇
0.0138 (0.35)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
–12–
REV. B