AD7879(Rev0) 데이터 시트보기 (PDF) - Analog Devices
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AD7879 Datasheet PDF : 36 Pages
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AD7879
SPI TIMING SPECIFICATIONS (AD7879)
TA = −40°C to +85°C; VCC = 1.6 V to 3.6 V, unless otherwise noted. Sample tested at 25°C to ensure compliance. All input signals are
specified with tR = tF = 5 ns (10% to 90% of VCC) and timed from a voltage level of 1.4 V.
Table 2.
Parameter1
fSCLK
t1
t2
t3
t4
t5
t6
t7
t8
Limit at TMIN, TMAX
5
5
20
20
15
15
20
16
15
Unit
MHz max
ns min
ns min
ns min
ns min
ns min
ns max
ns max
ns min
Description
CS falling edge to first SCL falling edge
SCL high pulse width
SCL low pulse width
DIN setup time
DIN hold time
DOUT access time after SCL falling edge
CS rising edge to DOUT high impedance
SCL rising edge to CS high
1 Guaranteed by design, not production tested.
CS
SCL
DIN
DOUT
t1
t2
1
t4
t5
MSB
t3
2
3
15
16
1
t8
2
15
16
LSB
t6
MSB
Figure 2. Detailed SPI Timing Diagram
t7
LSB
Rev. 0 | Page 4 of 36
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