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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

AD7247ABR 데이터 시트보기 (PDF) - Analog Devices

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제조사
AD7247ABR
ADI
Analog Devices 
AD7247ABR Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD7237A/AD7247A–SPECIFICATIONS(VDD = +12 V to +15 V,1 VSS = 0 V or –12 V to –15 V,1 AGND =
DGND = 0 V [AD7237A], GND = 0 V [AD7247A], REF IN = +5 V,
RL = 2 k, CL = 100 pF. All specifications TMIN to TMAX unless otherwise noted.)
Parameter
A2
B2
T2
Units
Test Conditions/Comments
STATIC PERFORMANCE
Resolution
12
12
12
Relative Accuracy3
±1
± 1/2
± 1/2
Differential Nonlinearity3
± 0.9
± 0.9
± 0.9
Unipolar Offset Error3
±3
±3
±4
Bipolar Zero Error3
±6
±4
±6
Full-Scale Error3, 5
±5
±5
±6
Full-Scale Mismatch5
±1
±1
±1
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
LSB typ
Guaranteed Monotonic
VSS = 0 V or –12 V to –15 V4. DAC Latch Contents All 0s
VSS = –12 V to –15 V4. DAC Latch Contents
1000 0000 0000
REFERENCE OUTPUT
REF OUT
Reference Temperature
Coefficient
Reference Load Change
(REF OUT vs. I)
4.97/5.03
± 25
–1
4.97/5.03
± 25
–1
4.95/5.05
± 25
–1
V min/max
ppm/°C typ
mV max Reference Load Current Change (0-100 µA)
REFERENCE INPUT
Reference Input Range
Input Current6
4.75/5.25
±5
4.75/5.25
±5
4.75/5.25
±5
V min/max 5 V ± 5%
µA max
DIGITAL INPUTS
Input High Voltage, VINH
2.4
2.4
2.4
Input Low Voltage, VINL
0.8
0.8
0.8
Input Current
IIN (Data Inputs)
Input Capacitance6
± 10
± 10
± 10
8
8
8
V min
V max
µA max
pF max
VIN = 0 V to VDD
ANALOG OUTPUTS
Output Range Resistors
Output Voltage Ranges7
Output Voltage Ranges7
DC Output Impedance
15/30
+5, +10
+5, +10, ± 5
0.5
15/30
+5, +10
+5, +10, ± 5
0.5
15/30
+5, +10, ± 5
0.5
AC CHARACTERISTICS6
Voltage Output Settling Time
Positive Full-Scale Change 8
8
10
Negative Full-Scale Change 8
8
10
Digital-to-Analog Glitch
Impulse3
30
30
30
Digital Feedthrough3
10
10
10
Digital Crosstalk3
30
30
30
kmin/max
V
typ
Single Supply; (VSS = 0 V)
Dual Supply; (VSS = –12 V to –15 V4)
µs max
µs max
Settling Time to Within ± 1/2 LSB of Final Value
DAC Latch all 0s to all 1s. Typically 5 µs
DAC Latch all 1s to all 0s. Typically 5 µs
VSS = –12 V to –15 V4.
nV secs typ DAC Latch Contents Toggled Between all 0s and all 1s
nV secs typ
nV secs typ
POWER REQUIREMENTS
VDD
VSS
IDD
ISS (Dual Supplies)
+10.8/+16.5 +11.4/+15.75 +11.4/+15.75 V min/max
–10.8/–16.5 –11.4/–15.75 –11.4/–15.75 V min/max
15
15
15
mA max
5
5
5
mA max
For Specified Performance Unless Otherwise Stated
For Specified Performance Unless Otherwise Stated
Output Unloaded. Typically 10 mA
Output Unloaded. Typically 3 mA
NOTES
1Power Supply tolerance is ± 10% for A version and ± 5% for B and T versions.
2Temperature ranges are as follows: A, B Versions, –40°C to +85°C; T Version, –55°C to +125°C.
3See Terminology.
4With appropriate power supply tolerances.
5Measured with respect to REF IN and includes unipolar/bipolar offset error.
6Sample tested @ +25°C to ensure compliance.
70 V to +10 V range is only available with VDD 14.25 V.
Specifications subject to change without notice.
–2–
REV. 0

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