AD7193BRUZ 데이터 시트보기 (PDF) - Analog Devices

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AD7193BRUZ

4-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA

Analog Devices 

AD7193

CS (I)

DOUT/RDY (O)

SCLK (I)

t1

t2

MSB

t3

t6

t5

LSB

t7

t4

I = INPUT, O = OUTPUT

Figure 3. Read Cycle Timing Diagram

CS (I)

t8

t11

SCLK (I)

DIN (I)

t9

t10

MSB

LSB

I = INPUT, O = OUTPUT

Figure 4. Write Cycle Timing Diagram

Rev. A | Page 8 of 56

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