A6810SLW-T 데이터 시트보기 (PDF) - Allegro MicroSystems

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A6810SLW-T

10-Bit Serial Input Latched Source Driver

Allegro MicroSystems 

A6810

10-Bit Serial Input Latched Source Driver

Features and Benefits

▪ Controlled output slew rate

▪ High-speed data storage

▪ 60 V minimum output breakdown

▪ High data-input rate

▪ PNP active pull-downs

▪ Low output-saturation voltages

▪ Low-power CMOS logic and latches

▪ Improved replacements for TL4810x, UCN5810x, and

UCQ5810x

Packages:

18-pin DIP

(A package)

Not to scale

20-pin SOICW

(LW package)

Description

The A6810 combines 10-bit CMOS shift registers,

accompanying data latches, and control circuitry with bipolar

sourcing outputs and PNP active pull-downs. Designed

primarily to drive vacuum-fluorescent (VF) displays, the 60 V

and –40 mA output ratings also allow this device to be used in

many other peripheral power driver applications. The A6810

features an increased data input rate (compared with the older

UCN/UCQ5810-F) and a controlled output slew rate.

The CMOS shift register and latches allow direct interfacing

with microprocessor-based systems. With a 3.3 or 5 V logic

supply, serial data-input rates of at least 10 MHz can be

attained

A CMOS serial data output permits cascaded connections in

applications requiring additional drive lines. Similar devices

are available as the A6812 (20-bit) and A6818 (32-bit).

TheA6810 output source drivers are NPN Darlingtons, capable

of sourcing up to 40 mA. The controlled output slew rate reduces

electromagnetic noise, which is an important consideration in

systems that include telecommunications and microprocessors,

and to meet government emissions regulations. For inter-digit

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Functional Block Diagram

26182.124I

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