Figure 6-6. ERAL Timing(1)
CS
SK
DI
1
00
1
0
DO
High-impedance
Note: 1. Valid only at VCC3 (Section 4.2).
Figure 6-7. WRAL Timing(1)
CS
SK
DI
1
0001
DO
High-impedance
Note: 1. Valid only at VCC3 (Section 4.2).
Figure 6-8. EWDS Timing
CS
SK
DI
1
0000
tCS
Check
Status
Standby
tSV
Busy
Ready
tDF
High-impedance
tWP
tCS
...
DN ... D0
Busy Ready
tWP
tCS
...
10 AT93C56B/66B [DATASHEET]
Atmel-8735C-SEEPROM-AT93C56B-66B-Datasheet_012015