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74LVC1G32GM(2007) 데이터 시트보기 (PDF) - NXP Semiconductors.

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74LVC1G32GM
(Rev.:2007)
NXP
NXP Semiconductors. 
74LVC1G32GM Datasheet PDF : 14 Pages
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NXP Semiconductors
74LVC1G32
Single 2-input OR gate
11. Dynamic characteristics
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for load circuit see Figure 8.
Symbol Parameter
Conditions
40 °C to +85 °C
Min Typ[1] Max
tpd
propagation delay A, B to Y; see Figure 7
[2]
VCC = 1.65 V to 1.95 V
1.0
3.1
8.0
VCC = 2.3 V to 2.7 V
0.5
2.1
5.5
VCC = 2.7 V
0.5
2.5
5.5
VCC = 3.0 V to 3.6 V
0.5
2.1
4.5
VCC = 4.5 V to 5.5 V
0.5
1.7
4.0
CPD
power dissipation VI = GND to VCC; VCC = 3.3 V [3] -
16
-
capacitance
40 °C to +125 °C Unit
Min
Max
1.0
10.5 ns
0.5
7.0 ns
0.5
7.0 ns
0.5
6.0 ns
0.5
5.5 ns
-
- pF
[1] Typical values are measured at Tamb = 25 °C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.
[2] tpd is the same as tPLH and tPHL.
[3] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = (CPD × VCC2 × fi × N) + (CL × VCC2 × fo) where:
VCC = supply voltage in V,
fi = input frequency in MHz,
N = number of inputs switching,
CL = output load capacitance in pF,
fo = output frequency in MHz.
12. AC waveforms
VI
A, B input
GND
VOH
Y output
VOL
VM
t PHL
VM
Measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 7. The input A, B to output Y propagation delays
t PLH
mna615
74LVC1G32_6
Product data sheet
Rev. 06 — 2 August 2007
© NXP B.V. 2007. All rights reserved.
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