74LVC1G14GW 데이터 시트보기 (PDF) - NXP Semiconductors.
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74LVC1G14GW Datasheet PDF : 20 Pages
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NXP Semiconductors
74LVC1G14
Single Schmitt-trigger inverter
15. Application information
The slow input rise and fall times cause additional power dissipation, this can be
calculated using the following formula:
Padd = fi (tr ICC(AV) + tf ICC(AV)) VCC where:
Padd = additional power dissipation (W);
fi = input frequency (MHz);
tr = input rise time (ns); 10 % to 90 %;
tf = input fall time (ns); 90 % to 10 %;
ICC(AV) = average additional supply current (A).
Average ICC(AV) differs with positive or negative input transitions, as shown in Figure 13.
An example of a relaxation circuit using the 74LVC1G14 is shown in Figure 14.
12
average
I CC
(mA) 10
8
mna642
positive-going
edge
6
4
negative-going
2
edge
0
0
2
4
6
VCC (V)
Linear change of VI between 0.8 V to 2.0 V.
All values given are typical unless otherwise specified.
Fig 13. Average additional supply current as a function of supply voltage
R
f
=
-1-
T
0----.-5-----1----R----C---
Fig 14. Relaxation oscillator
74LVC1G14
Product data sheet
C
mna035
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 6 August 2012
© NXP B.V. 2012. All rights reserved.
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