74LVC169D 데이터 시트보기 (PDF) - NXP Semiconductors.
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74LVC169D Datasheet PDF : 24 Pages
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NXP Semiconductors
74LVC169
Presettable synchronous 4-bit up/down binary counter
5. Pinning information
5.1 Pinning
U/D 1
CP 2
D0 3
D1 4
D2 5
D3 6
CEP 7
GND 8
74LVC169
16 VCC
15 TC
14 Q0
13 Q1
12 Q2
11 Q3
10 CET
9 PE
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Fig 4. Pin configuration for SO16 and (T)SSOP16
terminal 1
index area
74LVC169
CP 2
D0 3
D1 4
D2 5
D3 6
CEP 7
GND(1)
15 TC
14 Q0
13 Q1
12 Q2
11 Q3
10 CET
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Transparent top view
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 5. Pin configuration for DHVQFN16
5.2 Pin description
Table 2. Pin description
Symbol
Pin
U/D
1
CP
2
D0 to D3
3, 4, 5, 6
CEP
7
GND
8
PE
9
CET
10
Q0 to Q3
14, 13, 12, 11
TC
15
VCC
16
Description
up/down control input
clock input (LOW-to-HIGH, edge-triggered)
data input
count enable input (active LOW)
ground (0 V)
parallel enable input (active LOW)
count enable carry input (active LOW)
flip-flop output
terminal count output (active LOW)
supply voltage
74LVC169
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 29 November 2012
© NXP B.V. 2012. All rights reserved.
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